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 Data Sheet TLE6282G Dual Half Bridge Driver IC
* Compatible to very low ohmic normal Turn on current level input N-Channel MOSFETs Turn off current * Separate input for each MOSFET Supply voltage range * PWM frequency up to 50 kHz Gate Voltage * Operates down to 7.5V Temperature range supply voltage * Low EMC sensitivity and emission * Adjustable dead time with shoot through protection * Deactivation of dead time and shoot through protection possible * Short circuit protection for each Mosfet * Driver undervoltage shut down * Reverse polarity protection for the driver IC * Disable function * Input with TTL characteristics * 1 bit diagnosis * Integrated bootstrap diodes
Features
Product Summary
IGxx(on) IGxx(off) VVs VGS TJ
850 580 7.5 ... 60 10 -40...+150
mA mA V V C
* Dedicated for DC-brush high current motor bridges in PWM control mode and adapted for use in injector and valve applications for 12, 24 and 42V powernet applications. Useable as four fold lowside driver for unipolar 4 phase motor drives. * The two half bridges can operate independently. The two half bridges can even operate at different supply voltages.
Application
P-DSO 20
General Description
Dual half bridge driver IC for MOSFET power stages with multiple protection functions.
Block Diagram
Linear Regulator Charge Pump BH1 BH2
Floating HS Driver 1 + VGS limitation HS1 + Short circuit SCD detect. + Undervoltage Floating HS Driver 2 + VGS limitation HS2 + Short circuit SCD detect. + Undervoltage Floating LS Driver 1 + VGS limitation LS1 + Short circuit SCD detect. + Undervoltage Floating LS Driver 2 + VGS limitation LS2 + Short circuit SCD detect. + Undervoltage
VS GND
DH1 GH1 SH1 DH2 GH2 SH2 DL1 GL1
INH
IH1 IL1 IH2 IL2 DT/DIS Dead time Input control
HS1 LS1 HS2 LS2
Level
Undervoltage ERR Short circuit Detect.
OR
Undervoltage HSx Undervoltage LSx
Shift
Short Circuit Detection
DL2 GL2
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Application Block Diagram - Injector / Valve Drive
W atchdog Reset Q
TLE 4278G
D CD 47nF
I
V S =12V R 10 CS 47F
CQ 22F
RQ 47 k
CS 1F
WD
R
V CC
VS
BH1 DH1
CB 220nF
ER1
GH1 SH1 BH2 CB 220nF Load 1 GH2
RQ 47 k
DH2
DT/ DIS C
SH2
DL1 GL1 IH1 IL1 IH2 IL2
Load 2
DL2 GL2
GND
This application diagram shows the principle schematics of a typical injector / valve drive. Other configurations are possible as well. Freewheeling diodes are not considered. The 10 m resistor is not needed by the Driver IC, but may be needed for load current measurement. The voltage devider networks, e.g. R = 10 k, across the two Low Side MOSFETs are an example as well; they allow to increas the current limit threshold for Short Circuit protection SCD for the Low Side MOSFETs. As they pull down the Sources of the High Side MOSFETs (while the Low Side MOSFETs are off), they allow to pre-charge the CBx capacitors during start-up (before the Driver IC gets enabled). The SCD current limit threshold can be increased for the High Side MOSFETs as well by using voltage devider networks across the High Side MOSFETs. SCD can also be disabled (High Side and / or Low Side MOSFETs).
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
DT/DIS ERR IH1 IL1 IH2 IL2 GND VS DL2 DL1
1 2 3 4 5 6 7 8 9 10 10
20 19 18 17
GL2 SH2 GH2 BH2 DH2 DH1 BH1 GH1 SH1 GL1
TLE6282G
16 15 14 13 12 11
Pin 1
Symbol DT/DIS
Function a) Set adjustable dead time by external resistor b) Deactivate deadtime and shoot through protection by connecting to 0V c) Reset ERR register d) Disable output stages
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
ERR IH1 IL1 IH2 IL2 GND VS DL2 DL1 GL1 SH1 GH1 BH1 DH1 DH2 BH2 GH2 SH2 GL2
Error flag for driver shut down Control input for high side switch 1 Control input for low side switch 1 Control input for high side switch 2 Control input for low side switch 1 Ground Voltage supply Sense contact for short circuit detection low side 2 Sense contact for short circuit detection low side 1 Output to gate low side switch 1 Connection to source high side switch 1 Output to gate high side switch 1 Bootstrap supply high side switch 1 Sense contacts for short circuit detection high side 1 Sense contacts for short circuit detection high side 2 Bootstrap supply high side switch 2 Output to gate high side switch 2 Connection to source high side switch 2 Output to gate low side switch 2
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Maximum Ratings at Tj=-40...+150C unless specified otherwise Parameter Supply voltage 1 Operating temperature range Storage temperature range Max. voltage range at Ixx; DT/DIS Max. voltage range at ERR Max. voltage range at BHx Max. voltage range at DHx2 Max. voltage range at GHx3 Max. voltage range at SHx3 Max. voltage range at DLx Max. voltage range at GLx Max. voltage difference BHx - SHx Max. voltage difference GHx - SHx; GLx Power dissipation (DC) @ TA=125C / min.footprint Power dissipation (DC) @ TA=85C / min.footprint Electrostatic discharge voltage (Human Body Model) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993 Jedec Level Thermal resistance junction - ambient (minimal footprint with thermal vias) Thermal resistance junction - ambient (6 cm2) Symbol VS Tj Tstg Limits Values -4 60 -40 150 -55 150 -1 6 -0.3 6 -0.3 90 -4 75 -7 86 -7 75 -7 75 -2 12 -0.3 17 -0.3 11 0.33 0.85 2 Unit V C V V V V V V V V V V W W kV
VBHx VDHx VGHx VSHx VDLx VGLx VBHx-VSHx VGxx-VSxx Ptot Ptot VESD4
3 RthJA RthJA 75 75 K/W K/W
Functional range
Parameter and Conditions
at Tj = -40...+150 C, unless otherwise specified
Symbol
Values
Unit
Supply voltage Operating temperature range Max. voltage range at Ixx, DT/DIS Max. voltage range at ERR Max. voltage range at BHx Max. voltage range at DHx2 Max. voltage range at GHx3 Max. voltage range at SHx3
1 2
VS Tj
VBHx VDHx VGHx VSHx
7.5 -40 -0.3 -0.3 -0.3 -4 -7 -7
60 150 5.5 5.5 90 75 86 75
V C V V V V V V
With external resistor (10 ) and capacitor The min value -4V is increased to -( VBHx - VSHx) in case of bootstrap voltages <4V 3 The min value -7V is reduced to -(VBHx-VSHx-1V) in case of bootstrap voltages <8V 4 All test involving Gxx pins VESD=1 kV!
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Max. voltage range at DLx3 Max. voltage range at GLx Max. voltage difference BHx - SHx Max. voltage difference GHx - SHx; GLx PWM frequency Minimum on time external lowside switch - static condition @ 20 kHz; QGate = 200nC VDLx VGLx VBHx-VSHx VGxx-VSxx FPWM tp(min) -7 -2 -0.3 -0.3 0 75 12 12 11 50 2 V V V V kHz s
Electrical Characteristics
Parameter and Conditions
at Tj = -40...+150 C, unless otherwise specified and supply voltage range VS = 7.5 ... 60V; fPWM = 20kHz
Symbol
Values min typ max
Unit
Static Characteristics Low level output voltage (VGSxx) @ I=10mA High level output voltage (VGSxx) @ I=-10mA; Vs>12V Supply current at VS (device disabled) @ Vbat= VS =14V RDT=400k Supply current at VS (device disabled) @ Vbat= VS =42V RDT=400k Supply current at VS @ Vbat= VS =14V 20kHz (Outputs open) Supply current at VS @ Vbat= VS =14V 50kHz (Outputs open) Supply current at VS @ Vbat= VS =42V 20kHz (Outputs open) Low level input voltage High level input voltage Input hysteresis
VLL VHL
IVS(dis)14V IVS(dis)42V IVS(open)14V IVS(open)14V IVS(open)42V VIN(LL) VIN(HL)
-8 ------2.0 100
60 10 4 4 7 7 7 --170
150 11 8 8 15 15 15 1.0 --
mV V mA mA mA mA mA V V mV
VIN
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Dynamic characteristics (pls. see test circuit and timing diagram) Turn on current @ VGxx -VSxx = 0V; Tj=25C -IGxx(on) -@ VGxx -VSxx = 4V; Tj=125C @ CLoad=22nF; RLoad=0 Turn off current @ VGxx -VSxx = 10V; Tj=25C -IGxx(off) -@ VGxx -VSxx = 4V; Tj=125C @ CLoad=22nF; RLoad=0 Dead time (adjustable) @ RDT = 1 k tDT -0.05 @ RDT = 10 k 0.40 @ RDT = 50 k -@ RDT = 200 k @ CLoad=10nF ; Rload=1 Rise time @ CLoad=10nF ; Rload=1 (20% to 80%) t rise -Fall time @ CLoad=10nF ; Rload=1 (80% to 20%) tfall -Disable propagation time tP(DIS) 3.4 @ CLoad=10nF ; Rload=1 Reset time of diagnosis 1 tP(CL) @ CLoad=10nF ; Rload=1 Input propagation time tP(ILN) -(low side turns on, 0% to 10%) Input propagation time tP(ILF) -(low side turns off, 100% to 90%) Input propagation time tP(IHN) -(high side turns on, 0% to 10%) Input propagation time tP(IHF) -(high side turns off, 100% to 90%) Input propagation time difference tP(Diff) 20 (all channels turn on) Input propagation time difference tP(Diff) -(all channels turn off) Input propagation time difference tP(Diff) -(one channel; low on - high off) Input propagation time difference tP(Diff) -(one channel; high on - low off) Input propagation time difference tP(Diff) -(all channels; low on - high off) Input propagation time difference tP(Diff) -(all channels; high on - low off) 850 700 580 300 0 0.24 1.0 3.1 100 150 5 2 160 100 120 120 40 20 40 20 40 20 -----0.38 2.50 -300 440 7 3.1 500 500 500 500 70 50 150 150 150 150 mA
mA
s
ns ns s s ns ns ns ns ns ns ns ns ns ns
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Test Circuit and Timing Diagram
x2
IHX ILX
GHx
Rload = 1 Ohm Cload = 10 nF
SHx
IHx + ILx
VGHX_C
50%
t
GLx
P(IHN)
t
rise
t
P(IHF)
t
t
90%
fall
Rload = 1 Ohm Cload = 10 nF VGLX_C
VGHX_C
80%
20% 10%
t
t
P(ILF)
t
fall
t
P(ILN)
t
rise
Test Conditions :
Junction temperature Tj = -40 ... 150oC Supply voltage range Vs = 7.5 ... 60V PWM frequency fPWM = 20 kHz
VGLX_C
90% 80%
20%
10%
t
Diagnosis and Protection Functions Short circuit protection filter time Short circuit criteria (VDS of Mosfets) For Low Sides For High Sides Disable input level Disable input hysteresis Deactivation level for dead time and shoot through protection Deactivation input hysteresis Error level @ 1.6mA IERR Under voltage lock out for highside output - bootstrap voltage Under voltage lock out for lowside output - supply voltage
tSCP(off) VDS(SCP)
6 0.5 0.45 3.3 0.6
9 0.75 0.75 3.7 180 0.85 170 -3.7 4.8
12 1.0 1.05 4.0 1.1
s V V mV V mV V V V
VDIS VDIS VDIS VDIS VERR VBHx (uvlo) VVs (uvlo)
--
1.0 4.6 5.9
7
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Remarks: Default status of input pins: To assure a defined status of all input pins in case of disconnection, these pins are internally secured by pull up / pull down current sources with approx. 20A. The following table shows the default status of each input pin. Input pin ILx (active high) IHx (active low) DT/DIS (active high) Definition: In this datasheet a duty cycle of 98% means that the GLx pin is 2% of the PWM period in high condition. Functional description Description of Dead Time Pin / Disable Pin / Reset In the range between 1.5 and 3.5 V the dead time is varied from 100ns to 3.1s typ. In the range below 1.0V the dead time is disabled / shoot through is allowed. Both external Mosfets of the same half bridge can be switched on simultaneously. This function allows the use of a half bridge for valves and injectors. In the range above 4.0V the device is disabled. If DIS is pulled up to 5V for 3.1 to 3.4s only the ERR register is cleared (reset), no output stage is shut down. A shut down of all external Mosfets occurs if DIS is pulled up for longer than 7s. Condition of DT/DIS pin 0 - 1V 1.5 - 3.5V > 4V Function Disable of dead time; Shoot through is allowed Adjust dead time between 100ns and 3.1s typ. a) Reset of diagnosis register if DT/DIS voltage is higher than 4V for a time between 3.1s and 3.4s b) Shut down of output stages if DT/DIS voltage is higher than 4V for a time above 7s (Active pull down of gate voltage) Default status Low High High
Description of Diagnosis The ERR pin is an open collector output and has to be pulled up with external pull up resistors to 5V. In normal conditions the ERR signal is high. In case of shutdown of any output stage the ERR is pulled down. This shut down can be caused by undervoltage or short circuit. Recommended Start-up procedure The following procedure is recommended whenever the Driver IC is powered up: * * Disable the Driver IC via DT/DIS pin After the supply voltage has ramped up, wait for several ms to pre-charge the bootstrap capacitors of the High Side MOSFETs CBx through the resistors R on the DLx 8 Rev 2.2 2006-03-07
Data Sheet TLE6282G
* * pins (voltage devider network, pls. see Application block diagram on pg. 2) tWAIT 3 x CBx x 2 x R, whereas R = 10 k Enable the Driver IC via DT/DIS pin Start the operation by applying the desired pulse patterns. Do not apply any pulse patterns to the IHx or ILx pins, before the CBx capacitors are charged up.
Alternatively, the Driver IC can be enabled via the DT/DIS pin right after ramping up the supply voltage VS. Now, the two Low Side MOSFETs are turned on via the ILx control inputs (to pull down the Sources of the High Side MOSFETs and to charge up the bootstrap capacitors CBx within several 10 s). The regular operation can be started when the bootstrap capacitors are charged up. Short Circuit protection The current threshold limit to activate the Short Circuit protection function can be adjusted to larger values, it can not be adjusted to lower values. This can be done by external resistors to form voltage deviders across the "sense element" (pls. see Application block diagram on pg. 2), consisting of the Drain-Source-Terminals, a fraction of the PCB trace and - in some cases - current sense resistors (used by the C not by the Driver IC). The Short Circuit protection can be disabled for the High Side MOSFETs by shorting DH1 with SH1 and DH2 with SH2 on the PCB; in this case the DHx pins may not be connected to the Drains of the associated MOSFETs. To disable Short Circuit protection for the Low Side MOSFETs the DL1 and DL2 pin should be connected to the Driver ICs Ground. Shut down of the driver A shut down can be caused by undervoltage or short circuit. A short circuit will shut down only the affected Mosfet until a reset of the error register by a disable of the driver occurs. A shut down due to short circuit will occur only when the Short Circuit criteria VDS(SCP) is met for a duration equal to or longer than the Short Circuit filter time tSCP(off). Yet, the exposure to or above VDS(SCP) is not counted or accumulated. Hence, repetitive Short Circuit conditions shorter than tscp(off) will not result in a shut down of the affected MOSFET. An undervoltage shut down shuts only the affected output down. The affected output will auto restart after the undervoltage situation is over. Operation at Vs<12V If Vs<11.5V the gate voltage will not reach 10V. It will reach approx. Vs-1.5V, dependent on duty cycle, total gate charge and switching frequency. Operation at different voltages for Vs, DH1 and DH2 If DH1 and DH2 are used with a voltage higher than Vs, a duty cycle of 100% can not be guaranteed. In this case the driver is acting like a normal driver IC based on the bootstrap principle. This means that after a maximum "On" time of the highside switch of more than 1ms a refresh pulse to charge the bootstrap capacitor of about 1s is needed to avoid undervoltage lock out of this output stage. Operation at extreme duty cycle: The integrated charge pump allows an operation at 100% duty cycle. The charge pump is strong enough to replace leakage currents during "on"-phase of the highside switch. The gate charge for fast switching of the highside switches is supplied by the bootstrap capacitors. This means, that the bootstrap capacitor needs a minimum charging time of about 1s, if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of 96% can be reached). The exact value for the upper limit is given by the RC time formed by 9 Rev 2.2 2006-03-07
Data Sheet TLE6282G
the impedance of the internal bootstrap diode and the capacitor formed by the external Mosfet (CMosfet=QGate / VGS). The size of the bootstrap capacitor has to be adapted to the external MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times bigger then CMosfet. External components at the Vs Pin have to be considered, too. General remark: It is assured that after the removal of any fault condition, which did not damage the device, the device will return to normal conditions without external trigger. Only short circuit condition needs restart by reset. Estimation of power loss within the Driver IC The power loss within the Driver IC is strongly dependent on the use of the driver and the external components. Nevertheless a rough estimation of the worst case power loss is possible. Worst case calculation is: PLoss = (Qgate*n*const* fPWM + IVS(open)/20kHz)* VVs - PRGate With: PLoss = Power loss within the Driver IC fPWM = Switching freqency Qgate = Total gate charge of used MOSFETs at 10V VGS n = Number of switched MOSFETs const = Constant considering some leakage current in the driver (about 1.2) IVS(open) = Current consumption of driver without connected Mosfets during switching VVS = Voltage at Vs PRGate = Power dissipation in the external gate resistors This value can be reduced dramatically by usage of external gate resistors.
Estimated Power Loss PLOSS within the Driver IC for different supply voltages Vs at QG = 100nC @ VGS = 10V 0,8 0,7 0,6 PLOSS (W) 0,5 0,4 0,3 0,2 0,1 0 0 10 20 30 40 50 60 PWM Frequency (kHz)
Vs = 8V
Estimated Power Loss PLOSS within the Driver IC for different gate charges QG at supply voltage Vs = 14V 0,8 0,7 0,6 PLOSS (W) 0,5 0,4 0,3 0,2 0,1 0 0 10 20 30 40 50 60 PWM Frequency (kHz)
QG = 50nC QG = 100nC QG = 200nC
Vs = 14V Vs = 18V
Conditions : Junction temperature Tj = 25oC Number of switched MOSFET n = 2 Power dissipation in the external gate resistors PRGate = 0,2*PLoss
10
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Gate Drive characteristics
VIHx BHx
Logic + Level Shift + VGS limit + Under voltage
Vs
SCD
iGxx(on) iGxx(off)
DHx CB GHx iGHx
iGxx(on)
850 mA Peak
VIHx
iGxx(off)
580 mA Peak
SHx
Load iGHx
TLE6282G High Side Driver
Test Conditions : - Turn On : VGS = 0V, Tj = 25oC - Turn Off : VGS = 10V, Tj = 25oC
This figure represents the simplified internal circuit of one high side gate drive. The drive circuit of the low sides looks similar.
This figure illustrates typical voltage and current waveforms of the high side gate drive; the associated waveforms of the low side drives look similar.
11
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Truth Table ILx 1 0 1 1 0 1 0 1 1 0 1 0 1 1 0 X X Input IHx DT / DIS 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 X X <3.5V <3.5V 1.5-3.5V <1V <3.5V <3.5V <3.5V 1.5-3.5V <1V <3.5V <3.5V <3.5V 1.5-3.5V <1V <3.5V X >4V Conditions UV SC 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 X X 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 X X GLx 1 0 A 1 0 B 0 D B 0 E 0 D E 0 0 0 Output GHx 0 1 A 1 0 0 B D B 0 0 E D E 0 0 0 ERR 5V 5V 5V 5V 5V C C C C C F F F F F 5V 5V
A) stays in the condition before the shoot throught command occurs (see also dead time diagrams) B) 0 when affected; 1 when not affected; self recovery C) 0V when output does not correspond to input patterns; 5V when output corresponds to input patterns. D) stays in the condition before the shoot throught command occurs (see also dead time diagrams); 0 when affected E) 0 when affected- the outputs of the affected halfbridge are shut down and stay latched until reset; 1 when not affected F) 0V when output does not correspond to input patterns - the outputs of the affected halfbridge are shut down and stay latched until reset; 5V when output corresponds to input patterns. X) Condition has no influence Remark: Please consider the influence of the dead time for your input duty cycle
12
Rev 2.2 2006-03-07
Data Sheet TLE6282G Package and Ordering Code
(all dimensions in mm)
Package Code
P-DSO 20
13
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Published by Infineon Technologies AG, Bereich Kommunikation St.-Martin-Strasse 53, D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
14
Rev 2.2 2006-03-07


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